https://peertube6.f-si.org/about/instancehttps://peertube6.f-si.org/videos/localhttps://peertube6.f-si.org/w/odc7Hxkkc4LRqDWAeLewJQhttps://peertube6.f-si.org/lazy-static/thumbnails/6d5e53f3-072b-4e81-890e-1e7562c4152f.jpgHands-on with KLayout: Design rule checks and layout to netlist tools, Matthias Köfferlein, KLayoutConference program: https://wiki.f-si.org/index.php/FSiC2019https://peertube6.f-si.org/videos/embed/b3dcd37c-2289-4f17-adfa-0ad0ed6d1454https://peertube6.f-si.org/w/5udjBmAKnLjrWxc1XxUt5ohttps://peertube6.f-si.org/lazy-static/thumbnails/015c477b-b277-490a-8d1d-50c7891a0940.jpgAn opensource Wi-Fi chip, What, Why and How? Xianjun Jiao, IMECAn opensource Wi-Fi chip, What, Why and How? Xianjun Jiao, IMEChttps://peertube6.f-si.org/videos/embed/2454f923-66cc-4a75-a65e-08093d14b0bahttps://peertube6.f-si.org/w/nLjx998SVEuJPQRqbSVBbMhttps://peertube6.f-si.org/lazy-static/thumbnails/405f5583-aa7a-4f5b-bc6d-b546940fe75d.jpgThe long tail of semiconductors - Education, Tools and Artisanal ASICs, Matthew Venn, YosysHQ and...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/b0400fbf-3dfc-4f31-9df5-396f53281485https://peertube6.f-si.org/w/52AXE4ENcRMZtLPV9JSxxNhttps://peertube6.f-si.org/lazy-static/thumbnails/6ce46a3e-2d39-4730-af90-97defe6e7530.jpgIt's nice to have a choice: using Haskell for circuit design, Martijn Bastiaan and Lucas, QbaylogicConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/209dd7d0-5f17-453b-9915-5cfff05d4ac0https://peertube6.f-si.org/w/kXGGigEosBVMQXEPJVm3xWhttps://peertube6.f-si.org/lazy-static/thumbnails/0f812334-dc4e-4160-9938-fd36a24d0b02.jpgHow to debug a simulation? Tristan Gingold, GHDLConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/a1a49ef6-38dd-4c26-8a4c-8300038224f4https://peertube6.f-si.org/w/q79MYhhhTgQE8N63RbxEAshttps://peertube6.f-si.org/lazy-static/thumbnails/32669f99-ba2d-40d6-b9d1-04128d65403d.jpgOpen-Source Verification of Digital ASIC/FPGA Circuits, Stefano Minigutti, SyoSilConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/c3373586-bef8-4547-9b30-30a61084d93ehttps://peertube6.f-si.org/w/a3CUdL31KwwWNmWUkUp267https://peertube6.f-si.org/lazy-static/thumbnails/02c69fd2-8b55-41ef-b8df-38f8a009a0a7.jpgThe EPFL Logic Synthesis Libraries: open-source tools for classical and emerging technologies, Al...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/494079e3-5828-47b9-b551-b6fd2a5cee04https://peertube6.f-si.org/w/6sTipzg5dy8Ya83gNjLvrNhttps://peertube6.f-si.org/lazy-static/thumbnails/9117724d-a85e-4cc1-bb32-71d026247b8e.jpgMoving toward VexiiRiscv, Charles Papon, SpinalHDLConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/2c3ea569-361c-4275-a89d-16428ec98b6chttps://peertube6.f-si.org/w/oVrz2KteQcUp5ZhwxpixsDhttps://peertube6.f-si.org/lazy-static/thumbnails/f87d12db-ef63-4519-abe1-8a6b944409b9.jpgIHP open source PDK: KLayout Pycell Development status, Sergei Andreev, T. Zecha, Krzysztof Herma...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/b99f3a63-c95d-4195-98c8-c71d79ef755dhttps://peertube6.f-si.org/w/gC4tGqtoB5YTpsCZNLDfhwhttps://peertube6.f-si.org/lazy-static/thumbnails/cd2868e7-9af5-4469-8a6e-7881406e6f0b.jpgRevolutionize your chip design with GDSFactory and Open Source PDKs, Joaquin Matres Abril, GoogleConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/7e81ffac-7f71-4c34-8408-84dc70429f3ehttps://peertube6.f-si.org/w/o53qGHtAq3hdEQLfQfmRChhttps://peertube6.f-si.org/lazy-static/thumbnails/a1204461-b0fd-4e50-85bb-5fc8aae6c142.jpgThe ACT EDA flow for asynchronous logic, Rajit Manohar, YaleConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/b2b98546-cb03-4756-9041-16241b719d9chttps://peertube6.f-si.org/w/fP6y81q9Yd2PZ9KQsjkr4dhttps://peertube6.f-si.org/lazy-static/thumbnails/4ad39a7f-fa45-441b-8b7a-8cd34b5bf511.jpgUpdate on IHP open source PDK initiative, Rene Scholz, Sergei Andreev, Krzysztof Herman, IHP Micr...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/77f35232-a1f3-4ea7-b169-d27895637d16https://peertube6.f-si.org/w/iboWrspr19LYY6jbG5RiWqhttps://peertube6.f-si.org/lazy-static/thumbnails/84147de8-045e-4b09-9fe0-b18de5ad72cb.jpgMixed signal support on Tiny Tapeout, Matthew Venn, YosysHQ and Tiny TapeoutConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/8b1eee6b-fc49-48a4-a7e2-d52d3f743320https://peertube6.f-si.org/w/2TW3YRx7i6BUDFi3huiEr9https://peertube6.f-si.org/lazy-static/thumbnails/81dd6232-6e1b-4d1a-988e-88870346d442.jpgCaravel Panamax: The Next Generation, Tim Edwards, Efabless and Open Circuit DesignConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/0f59619b-7960-46bd-a3c1-ef5112295d72https://peertube6.f-si.org/w/p1cAaHTZY39bpaQ9pVbaXkhttps://peertube6.f-si.org/lazy-static/thumbnails/13fa4c4e-e1dd-4428-808d-a6e3b7300e7b.jpgAchieving Competitive Performance with Open EDA Tools on an Open-Source Linux-Capable RISC-V SoC,...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/ba4954ca-7a03-402e-9057-944b14093f0dhttps://peertube6.f-si.org/w/gqi9oSYxvX92AkmKSngVcbhttps://peertube6.f-si.org/lazy-static/thumbnails/4d7ff80c-2824-4380-a393-be39c935a2ea.jpgWorking towards FOSS RF IC design in SKY130, Jelle Verest, TU EindhovenConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/7cdd7f06-ba7b-42d0-9e6a-b34b4b1e28a4https://peertube6.f-si.org/w/m2ZBtfDkmZsb48uxc42TFAhttps://peertube6.f-si.org/lazy-static/thumbnails/18b7db37-1f41-4598-9de3-76775821b72f.jpgUnlocking the power: energy management open-source analog building blocks, Jorge Marin and Christ...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/a23e0577-1aea-44d8-90f9-38d6f13cdb1chttps://peertube6.f-si.org/w/sY6kLhsyixeJ4afGDWHyjChttps://peertube6.f-si.org/lazy-static/thumbnails/46ce5b98-b05c-47fb-a176-aef52c9caff0.jpgProject Arrakeen: a framework for scalable and portable digital and analog circuits, Staf Verhaeg...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/da628c31-bd8f-4959-bcea-ee52fffcdea0https://peertube6.f-si.org/w/wiLpzCHsUEThHbophdEq9yhttps://peertube6.f-si.org/lazy-static/thumbnails/379d903f-0eda-42f6-9f0b-fa14d969bbd8.jpgACM2 – A design-oriented model for open-source tools, Deni Alves, Federal University of Santa Cat...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/f56d2b9f-3825-4e18-8c52-f4504fe2d8c0https://peertube6.f-si.org/w/owFdtfpCsV6UNpiHQVs6Eihttps://peertube6.f-si.org/lazy-static/thumbnails/6d40ae05-91d7-4d45-a4c9-b8cc94ae0268.jpgVACASK: a Verilog-A Circuit Analysis Kernel, Arpad Buermen, University of LjubljanaConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/b67187dd-4503-46e3-9fa2-d06297119281https://peertube6.f-si.org/w/4cZJR2vUhkx6GiU8fFCMgRhttps://peertube6.f-si.org/lazy-static/thumbnails/40b1c27b-01c3-4258-8955-9dc4c0769d62.jpgVerilog-AMS in Gnucap, Felix Salfelder, Gnucap MixedSignalsConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/19f82e21-47df-4d82-84d9-a8b41ffaf77bhttps://peertube6.f-si.org/w/5DEDtxefm2b2WC2yccEHTkhttps://peertube6.f-si.org/lazy-static/thumbnails/7926391c-668e-47aa-be1f-4d4439d54128.jpgPyOpus - a Python library for design automation, Arpad Buermen, University of LjubljanaConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/25a6e401-5efc-49a0-b1c4-3a4a30239c65https://peertube6.f-si.org/w/5EbSAk42jnguhmq1CqYx3Qhttps://peertube6.f-si.org/lazy-static/thumbnails/124a136e-a41c-4d3d-880e-7b8a9106e6af.jpgDegate: The stakes and challenges of silicon reverse engineering, Dorian Bachelot, DegateConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/25b984a7-3963-4671-8a54-e742595bdcc0https://peertube6.f-si.org/w/86uPXCpMWUZJ6QCUJG6GnZhttps://peertube6.f-si.org/lazy-static/thumbnails/f339d1de-7f4c-4d4d-af61-d77426d37a65.jpgTight side-channel security bounds on hardware cryptographic engines, J. Béguinot, W. Cheng, S. G...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/39747465-0724-4114-a015-0f7dd8efad23https://peertube6.f-si.org/w/tvQG8Hgr9VAEFaSwynxMvghttps://peertube6.f-si.org/lazy-static/thumbnails/7da1f04b-f160-4632-951e-5164a6e62113.jpgEUROPRACTICE's Catalog and IP Sharing Program, Helio Fernandez Tellez, imecConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/ded15214-b67e-441e-8ce9-3fcd6b99469dhttps://peertube6.f-si.org/w/q24zuZwNVXhBg9GYeLdxwkhttps://peertube6.f-si.org/lazy-static/thumbnails/b6c4b2dd-2dad-4a64-988e-27dbd819846f.jpgCACE: Defining an open-source analog and mixed-signal design flow, Leo Moser and Tim Edwards, Efa...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/c28146c0-73ec-4776-a6f0-84c94dabfbfbhttps://peertube6.f-si.org/w/8JHBysK8TMdgD44XgeCrtPhttps://peertube6.f-si.org/lazy-static/thumbnails/7a501491-0528-4cac-ba62-e8df6e71236f.jpgGerman Microelectronics Design Initiative, Korbinian Schreiber and Tina Tauchnitz, VDI/VDE-ITConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/3ea6da9b-fc14-4eea-9c21-67ce4f7192e1https://peertube6.f-si.org/w/gR8E288wkZbqpx3WmbxT91https://peertube6.f-si.org/lazy-static/thumbnails/957a91a3-6420-49c7-afb3-2c02baf05bda.jpgBeyond tape-out: open the dark side, Philippe Morey-Chaisemartin, Xyalis/OASISConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/80553e14-b002-4e2e-922c-484e3bf21974https://peertube6.f-si.org/w/2qFZRHMEaxP4KNHRtjgXCKhttps://peertube6.f-si.org/lazy-static/thumbnails/8ffefaea-5e89-4ec5-888b-70c5f0418f0c.jpgFrom Theory to Tape-Out: Chip Design Education with Edu4Chip, Luca Pezzarossa, DTUConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/0b8ba374-acc9-4344-a428-1a8abcb23727https://peertube6.f-si.org/w/dVM283Zq19uizeUfA6orn9https://peertube6.f-si.org/lazy-static/thumbnails/e2cebfeb-3977-4b45-bdc0-62dd745c8971.jpgIntegrating Mixed-Signal Microelectronics and Photonics: A Co-Design Approach with Piel, Dario Qu...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/68afd3f0-19d8-47ac-841c-caa9c07d31cehttps://peertube6.f-si.org/w/42aYfH7i74fgrNAowTpXz9https://peertube6.f-si.org/lazy-static/thumbnails/2a46739f-2548-4e4e-95ff-3bda86049b3f.jpgQuaigh: open source test pattern generation, Gabriel Gouvine, LIP6Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/18754dcd-3a26-4677-955b-f7f2eb38d946https://peertube6.f-si.org/w/dsom2uxSM6wi5hsCEwC3Qchttps://peertube6.f-si.org/lazy-static/thumbnails/cd2964b3-1e16-497c-ad56-05306e403f5a.jpgAccessibility and availability of Open EDA tools: the nightmare of distributions’ dependencies, M...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/64dcc5cf-d4f2-446e-aaa6-61bb41893e73https://peertube6.f-si.org/w/9j3hASx251Rz7wRiQfFUyphttps://peertube6.f-si.org/lazy-static/thumbnails/f4bf9349-631d-4813-b1e1-cd5c6f916500.jpgCircuit design with Open EDA tools: a case study, Ali Oudrhiri, LIP6Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/434de7f4-bad4-46e6-8d5c-a5922a18465fhttps://peertube6.f-si.org/w/gRVA1zKKDqQWZkqfC3mWKPhttps://peertube6.f-si.org/lazy-static/thumbnails/051197c0-12b7-4a11-a2c8-b447b7e67add.jpgFault, Open-Source EDA's Missing DFT Toolchain, Mohamed Gaber, AUCConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/80718c64-959f-499a-84a1-cf41fb5d67c5https://peertube6.f-si.org/w/1k2ciseGijFxR86ZKZcUAvhttps://peertube6.f-si.org/lazy-static/thumbnails/db5a1ea9-02cd-4a09-a321-4a833ca0d7d1.jpgLiberty74: An Open-Source Verilog-to-PCB Flow, Tobias Senti, ETH ZurichConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/02a7de33-d290-4724-a5f9-303b1a9ccb09https://peertube6.f-si.org/w/u9UxBw9Vhxmdt1KPhUgSW3https://peertube6.f-si.org/lazy-static/thumbnails/5e6fd1b1-03cf-4c1e-ab05-473417a50328.jpgnaja_edit: An Open Source Tool for Gate-Level Netlist Optimization and Editing, Christophe Alexan...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/e3fe36f4-c0ab-4d3f-9a4b-dd0e68974e1ehttps://peertube6.f-si.org/w/3HeoCr87AG9KY2792AFtc7https://peertube6.f-si.org/lazy-static/thumbnails/f8350419-04bd-4877-bcb8-c34acd3729d1.jpgGenerating DRC Runsets for IHP's OpenPDK - Lessons Learned, Andreas Krinke, TU DresdenConference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/15f4061b-83d3-47b5-87c6-9c61d959c128https://peertube6.f-si.org/w/o1CKvR9MgWFUzVd2cXQ3dwhttps://peertube6.f-si.org/lazy-static/thumbnails/12166823-63e5-4566-bfe2-58dd50f73021.jpgOpenROAD and The OpenROAD Initiative: Foundations for Open Innovation, Andrew Kahng, OpenROAD Ini...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/b23fb2db-daaa-4db2-b1a1-97cfce7b1c2ehttps://peertube6.f-si.org/w/c4hRPaKp7MxcKo26h49MG2https://peertube6.f-si.org/lazy-static/thumbnails/acb9ed8c-c292-4a83-acf0-9fd6eea54d85.jpgFOSS EKV3 Charge-based MOS Transistor Model: an Engineering and Educational Tool, Wladek Grabinsk...Conference program: https://wiki.f-si.org/index.php/FSiC2024https://peertube6.f-si.org/videos/embed/598a256d-ac69-4065-b478-ea0241c8fc95https://peertube6.f-si.org/w/7psUrwjPXo3CatJdAM84Pghttps://peertube6.f-si.org/lazy-static/thumbnails/5c661b02-1525-4951-966e-54d19e6beca7.jpgDRAM simulation with the simulator DRAMSys, Matthias JungDRAM simulation with the simulator DRAMSys, Matthias Junghttps://peertube6.f-si.org/videos/embed/33dd84d8-e52e-4f4b-b950-f8f1108a7d49https://peertube6.f-si.org/w/3vdrJqLsdDBehQNDF3auqXhttps://peertube6.f-si.org/lazy-static/thumbnails/a35015f8-8760-4fe2-9fd9-28dbf2e72c8b.jpgThe potential for asynchronous circuits to bridge the hardware / software divide, Edward Bingham,...The potential for asynchronous circuits to bridge the hardware / software divide, Edward Bingham, Broccolimicrohttps://peertube6.f-si.org/videos/embed/144683eb-fcd2-48e7-8022-346d7eb1dcbfhttps://peertube6.f-si.org/w/qSVzALavfsD3W1XcT8zdgEhttps://peertube6.f-si.org/lazy-static/thumbnails/2b4e5256-2721-40d8-be4b-cc9a2051f99a.jpgaigverse: Toward machine learning driven logic synthesis, Marcel Walteraigverse: Toward machine learning driven logic synthesis, Marcel Walterhttps://peertube6.f-si.org/videos/embed/c9778927-4bf8-41bc-90ba-5d51883f7cf4https://peertube6.f-si.org/w/dtm5PA96zdMuYrLbfDYBCdhttps://peertube6.f-si.org/lazy-static/thumbnails/44be3e83-6454-45ba-8e41-ae917f6d9189.jpgTowards open source functional verification methodologies, Tjark PetersenTowards open source functional verification methodologies, Tjark Petersenhttps://peertube6.f-si.org/videos/embed/64ff1f53-7799-404c-8929-dfce40874c70https://peertube6.f-si.org/w/8wkK9KotofbZ6vQVHCfUmehttps://peertube6.f-si.org/lazy-static/thumbnails/a7c24df4-6fc5-4e59-933c-d77d3dc88d10.jpgOpenVADL: An open source implementation of the Vienna Architecture Description Language, Andreas ...OpenVADL: An open source implementation of the Vienna Architecture Description Language, Andreas Krall, TU Wienhttps://peertube6.f-si.org/videos/embed/3cec738d-a05e-476c-be02-82ce1b054135https://peertube6.f-si.org/w/e2t3eYgNiaJYrPa95PicYVhttps://peertube6.f-si.org/lazy-static/thumbnails/de56989d-4ab4-46c5-a334-2415006fc4b6.jpgKactus2, Kari Hepola, Tampere UniversityKactus2, Kari Hepola, Tampere Universityhttps://peertube6.f-si.org/videos/embed/697b35a1-dd64-4e66-9751-a92da8dd2009https://peertube6.f-si.org/w/3NLiXjeNPuYtsRK2LvjVGXhttps://peertube6.f-si.org/lazy-static/thumbnails/8972db76-24df-4ada-a1ee-68a4189ae061.jpgB-ASIC: a framework for simulation and implementation of static DSP algorithms, Oscar Gustafsson,...B-ASIC: a framework for simulation and implementation of static DSP algorithms, Oscar Gustafsson, Linköping Universityhttps://peertube6.f-si.org/videos/embed/16b9cc26-e0c3-4d3b-8ee1-f0e2dd3a559bhttps://peertube6.f-si.org/w/98cAbUaXdoKpBq5qBMDR4Phttps://peertube6.f-si.org/lazy-static/thumbnails/c5dacf96-386a-4e81-807b-a787fd461275.jpgOpenASIP: Co-processor co-design using open source tooling, Joonas Multanen, Tampere UniversityOpenASIP: Co-processor co-design using open source tooling, Joonas Multanen, Tampere Universityhttps://peertube6.f-si.org/videos/embed/41ca753a-44c5-47e1-a22c-0d51c9ce0739https://peertube6.f-si.org/w/1FpEYtLLRYDpinypSRFsrihttps://peertube6.f-si.org/lazy-static/thumbnails/8cbbd8ef-7550-4a04-a977-3036bbc42593.jpgGreyhound: A RISC-V SoC with tightly coupled eFPGA on IHP SG13G2, Leo Moser, EfablessGreyhound: A RISC-V SoC with tightly coupled eFPGA on IHP SG13G2, Leo Moser, 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